Veri-Tech, Inc.
Providing Proven Technology 
 
 

Parallelization of ADCIRC

 

ADCIRC has been optimized for both vector and parallel computer architectures. The parallel capabilities of ADCIRC are based on a domain decomposition strategy with information at sub-domain interfaces being passed using the MPI library. The resulting speedup is linear or super linear for large problems. For example, for a 300,000 node grid with 2 second time steps, the wall clock time is about 2 hours per 24-hr day of simulation using 128 processors on a CRAY T3E. On a 1.8 GHz Xeon processor based machine, performance is about 4 times faster with the same number of processors. Performance will be linearly proportional to the number of nodes, time steps, and processors. On your single processor PC such a run might take about 10 days computer time!

The SMS ADCIRC package contains all the necessary tools and interfaces to run the ADCIRC model on a PC. To be able to use the SMS package with data from a MPI version of the ADCIRC model requires you to purchase the ADCIRC model license that is furnished with the SMS system. SMS does not run on an MPI platform (e.g., a LINUX cluster), but pre- and post-processing activities can be carried out on your PC giving you the gridding and visualization power you need to develop and analyze information to and from a “batch” run on the MPI.

Veri-Tech, Inc. is now offering MPI (multi-cpu) ADCIRC licenses and services to tailor the ADCIRC system to your MPI platform. Call [601-636-1454], FAX [601-638-5641] or to find out more information.